零件编号 : 74AHC273
功能 : ctal D-type flip-flop with reset; positive-edge trigger
制造商 : NXP Semiconductors.
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
The common clock (CP) and master reset (MR) inputs, load and reset (clear) all flip-flops
simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.
All outputs will be forced LOW, independent of clock or data inputs, by a LOW on theMR
input. The device is useful for applications where only the true output is required and the clock
and master reset are common to all storage elements.